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Data Sheet No. PD60161-Q
IR2108(4) (S)
Features
HALF-BRIDGE DRIVER
Packages
Fully operational to +600V 14-Lead SOIC Tolerant to negative transient voltage 8-Lead SOIC IR21084S IR2108S dV/dt immune * Gate drive supply range from 10 to 20V * Undervoltage lockout for both channels 14-Lead PDIP * 3.3V, 5V and 15V input logic compatible IR21084 * Cross-conduction prevention logic 8-Lead PDIP * Matched propagation delay for both channels IR2108 * High side output in phase with HIN input * Low side output out of phase with LIN input * Logic and power ground +/- 5V offset. 2106/2301//2108//2109/2302/2304 Feature Comparison * Internal 540ns dead-time, and Crossprogrammable up to 5us with one Input conduction external RDT resistor (IR21084) Dead-Time Ground Pins Part prevention logic * Lower di/dt gate driver for better logic noise immunity 2106/2301 COM
* Floating channel designed for bootstrap operation
Description
Programmable 0.54~5 s The IR2108(4)(S) are high voltage, high speed Internal 540ns IN/SD yes power MOSFET and IGBT drivers with depenProgrammable 0.54~5 s dent high and low side referenced output yes Internal 100ns HIN/LIN COM 2304 channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
21064 2108 21084 2109/2302 21094
HIN/LIN
no
none
HIN/LIN
yes
Internal 540ns
VSS/COM COM VSS/COM COM VSS/COM
Typical Connection
up to 600V VCC
VCC
HIN LIN
VB HO VS LO
TO LOAD
HIN LIN COM
up to 600V
IR2108
VCC HIN LIN VCC HIN LIN DT V SS RDT VSS
HO VB VS
IR21084
TO LOAD
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
COM LO
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1
IR2108(4) (S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB VS VHO VCC VLO DT VIN VSS dVS/dt PD
Definition
High side floating absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Programmable dead-time pin voltage (IR21084 only) Logic input voltage (HIN & LIN) Logic ground (IR21084 only) Allowable offset supply voltage transient Package power dissipation @ T A +25C (8 lead PDIP) (8 lead SOIC) (14 lead PDIP) (14 lead SOIC)
Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 VSS - 0.3 VSS - 0.3 VCC - 25 -- -- -- -- -- -- -- -- -- -- -50 --
Max.
625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 50 1.0 0.625 1.6 1.0 125 200 75 120 150 150 300
Units
V
V/ns
W
RthJA
Thermal resistance, junction to ambient
(8 lead PDIP) (8 lead SOIC) (14 lead PDIP) (14 lead SOIC)
C/W
TJ TS TL
Junction temperature Storage temperature Lead temperature (soldering, 10 seconds)
C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.
Symbol
VB VS VHO VCC VLO VIN DT VSS
Definition
High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage IR2108 IR21084 Programmable dead-time pin voltage (IR21084 only) Logic ground (IR21084 only)
Min.
VS + 10 Note 1 VS 10 0 COM VSS VSS -5
Max.
VS + 20 600 VB 20 VCC VCC VCC VCC 5
Units
V
C TA Ambient temperature -40 125 Note 1: Logic operational for V S of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details).
2
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IR2108(4) (S)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25C, DT = VSS unless otherwise specified.
Symbol
ton toff MT tr tf DT MDT
Definition
Turn-on propagation delay Turn-off propagation delay Delay matching | ton - toff | Turn-on rise time Turn-off fall time Deadtime: LO turn-off to HO turn-on(DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) Deadtime matching = | DTLO-HO - DTHO-LO |
Min.
-- -- -- -- -- 400 4 -- --
Typ.
220 200 0 150 50 540 5 0 0
Max. Units Test Conditions
300 280 30 220 80 680 6 60 600 usec nsec nsec VS = 0V VS = 0V RDT= 0 RDT = 200k (IR21084) RDT=0 RDT = 200k (IR21084) VS = 0V VS = 0V or 600V
Static Electrical Characteristics
VBIAS (V CC , VBS ) = 15V, VSS = COM, DT= VSS and TA = 25C unless otherwise specified. The VIL, V IH and IIN parameters are referenced to VSS/COM and are applicable to the respective input leads: HIN and LIN. The V O, I O and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
VIH VIL VOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH IO+ IO-
Definition
Logic "1" input voltage for HIN & logic "0" for LIN Logic "0" input voltage for HIN & logic "1" for LIN High level output voltage, V BIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic "1" input bias current Logic "0" input bias current VCC and VBS supply undervoltage positive going threshold VCC and VBS supply undervoltage negative going threshold Hysteresis Output high short circuit pulsed current Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
2.9 -- -- -- -- 20 0.4 -- -- 8.0 7.4 0.3 120 250 -- -- 0.8 0.3 -- 75 1.0 5 -- 8.9 8.2 0.7 200 350 -- 0.8 1.4 0.6 50 130 1.6 20 2 9.8 9.0 V -- -- -- mA VO = 0V, PW 10 s VO = 15V, PW 10 s A A mA V VCC = 10V to 20V VCC = 10V to 20V IO = 20 mA IO = 20 mA VB = VS = 600V VIN = 0V or 5V VIN = 0V or 5V RDT=0 HIN = 5V, LIN = 0V HIN = 0V, LIN = 5V
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IR2108(4) (S)
Functional Block Diagram
VB
2108
HV LEVEL SHIFTER
UV DETECT R PULSE FILTER R S Q
HO
HIN
VSS/COM LEVEL SHIFT
VS
PULSE GENERATOR
DT
DEADTIME & SHOOT-THROUGH PREVENTION UV DETECT
VCC
+5V
LO
LIN
VSS/COM LEVEL SHIFT
DELAY
COM
VSS
VB
21084
HIN
VSS/COM LEVEL SHIFT HV LEVEL SHIFTER PULSE GENERATOR PULSE FILTER
UV DETECT R R S Q
HO
VS
DT
+5V
DEADTIME & SHOOT-THROUGH PREVENTION UV DETECT
VCC
LO
LIN
VSS/COM LEVEL SHIFT
DELAY
COM
VSS
4
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IR2108(4) (S)
Lead Definitions
Symbol Description
HIN Logic input for high side gate driver output (HO), in phase (referenced to COM for IR2108 and VSS for IR21084) Logic input for low side gate driver output (LO), out of phase (referenced to COM for IR2108 and VSS for IR21084) DT VSS VB HO VS VCC LO COM Programmable dead-time lead, referenced to VSS. (IR21084 only) Logic Ground (21084 only) High side floating supply High side gate driver output High side floating supply return Low side and logic fixed supply Low side gate driver output Low side return
LIN
Lead Assignments
1 2 3 4 VCC HIN LIN COM VB HO VS LO
8
7 6 5
1 2 3 4
VCC HIN LIN COM
VB HO VS LO
8
7 6 5
8 Lead PDIP
8 Lead SOIC
IR2108
IR2108S
1 2 3 4 5 6 7
VCC HIN LIN DT VSS COM LO VB HO VS
14
13 12 11 10 9 8
1 2 3 4 5 6 7
VCC HIN LIN DT VSS COM LO VB HO VS
14
13 12 11 10 9 8
14 Lead PDIP
14 Lead SOIC
IR21084
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IR21084S
5
IR2108(4) (S)
HIN
LIN
HO
LIN
50% 50%
LO
ton
Figure 1. Input/Output Timing Diagram
tr 90%
toff 90%
tf
LO
10%
10%
50%
50%
HIN
ton tr 90%
HIN LIN
50% 50%
toff 90%
tf
HO
90%
10%
10%
Figure 2. Switching Time Waveform Definitions
HO LO
DT LO-HO
10% DTHO-LO
90%
10% MDT= DTLO-HO - DT
HO-LO
Figure 3. Deadtime Waveform Definitions
6
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IR2108(4) (S)
Turn-on Propagation Delay (ns)
Turn-on Propagation Delay (ns)
500 400 300
M ax.
500 400 300 200 100 0 10 12 14 16 18 20 V BIAS Supply Voltage (V) Figure 4B. Turn-on Propagation Delay vs. Supply Voltage
Typ.
M ax.
200
Typ.
100 0 -50 -25 0 25 50
o
75
100 125
Temperature ( C) Figure 4A. Turn-on Propagation Delay vs. Tem perature
Turn-off Propagation Delay (ns)
Turn-off Propagation Delay (ns)
500 400 300
M ax.
500 400
M ax.
300
Typ.
200
Typ.
200 100 0 10 12 14 16 18 20 V BIAS Supply Voltage (V) Figure 5B. Turn-off Propagation Delay vs. Supply Voltage
100 0 -50 -25 0 25 50 75 100 125 Temperature (oC) Figure 5A. Turn-off Propagation Delay vs.Tem perature
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7
IR2108(4) (S)
500 Turn-on Rise Time (ns) 400 300 200 100 0 -50 -25 0 25 50 75 100 125 Temperature ( oC) Figure 6A.Turn-on Rise Tim e vs. Tem perature
M ax.
500 Turn-on Rise Time (ns) 400 300 200
Typ. M ax.
Typ.
100 0 10 12 14 16 18 20 V BIAS Supply Voltage (V) Figure 6B. Turn-on Rise Tim e vs. Supply Voltage
200 Turn-off Fall Time (ns) 150 100
M ax.
200 Turn-off Fall Time (ns) 150 100 50 0 -50 -25 0 25 50
o M ax.
50
Typ.
Typ.
0 75 100 125 Temperature ( C)
10
12
14
16
18
20
V BIAS Supply Voltage (V)
Figure 7A. Turn-off Fall Tim e vs. Tem perature
Figure 7B. Turn-off Fall Tim e vs. Supply Voltage
8
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IR2108(4) (S)
1000 800
M ax.
1000 800 600 400 200 -50 -25 0 25 50 75 100 125 10 12 14 16 18 20 V BIAS Supply Voltage (V) Figure 8B. Deadtim e vs. Supply Voltage
Deadtime (ns)
Deadtime (ns)
M ax. Typ.
600
Typ.
Mi n.
400 200
Mi n.
Temperature (oC) Figure 8A. Deadtim e vs. Tem perature
7 6 Deadtime ( s) 5 4 3 2 1 0 0 50 100 RDT (K) Figure 8C. Deadtim e vs. RDT (IR21084 Only) 150 200
Typ. Mi n. M ax.
8 7 Input Voltage (V) 6 5 4
M ax.
3 2 1 0 -50 -25 0 25 50 75 100 125 Temperature ( oC) Figure 9A. Logic "1" Input Voltage vs. Tem perature
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9
IR2108(4) (S)
8 7 Input Voltage (V) 5 4 3 2 1 0 10 12 14 16 18 20 V CC Supply Voltage (V) Figure 9B. Logic "1" Input Voltage vs. Supply Voltage
M ax.
4.0 Input Voltage (V) 3.2 2.4 1.6
Mi n.
6
0.8 0.0 -50 -25 0 25 50 75 100 125 Temperature (oC) Figure 10A. Logic "0" Input Voltage vs. Tem perature
3.2 Input Voltage (V) 2.4 1.6
Mi n.
High Level Output Voltage (V)
4.0
4 3 2 1
M ax.
0.8 0.0 10 12 14 16 18 20 V CC Supply Voltage (V) Figure 10B. Logic "0" Input Voltage vs. Supply Voltage
Typ.
0 -50
-25
0
25
50
o
75
100
125
Temperature ( C) Figure 11A. High Level Output vs. Temperature
10
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IR2108(4) (S)
High Level Output Voltage (V)
4 Low Level Output Voltage (V) 3 2 1
Typ.
1.5 1.2 0.9 0.6 0.3
Typ.
M ax.
M ax.
0 10 12 14 16 18 20 V CC Supply Voltage (V) Figure 11B. High Level Output vs. Supply Voltage
0 -50 -25 0 25 50
o
75
100
125
Temperature ( C) Figure 12A. Low Level Output vs. Tem perature
Offset Supply Leakage Current ( A)
1.5 Low Level Output Voltage (V) 1.2 0.9
M ax.
500 400 300 200 100
M ax.
0.6
Typ.
0.3 0 10 12 14 16 18 20 V CC Supply Voltage (V) Figure 12B. Low Level Output vs. Supply Voltage
0 -50 -25 0 25 50
o
75
100
125
Temperature ( C) Figure 13A. Offset Supply Leakage Current vs. Tem perature
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11
IR2108(4) (S)
Offset Supply Leakage Current ( A)
500 400 300 200 100
M ax.
400 V BS Supply Current ( A)
300
200
M ax.
100
Typ. Mi n.
0 0 100 200 300 400 500 600 V B Boost Voltage (V) Figure 13B. Offset Supply Leakage Current vs. Tem perature
0 -50 -25 0 25 50 75 Temperature ( oC) 100 125
Figure 14A. V BS Supply Current vs. Tem perature
400 Vcc Supply Current (mA) V BS Supply Current ( A)
3.0 2.5 2.0
M ax.
300
200
M ax. Typ. Mi n.
1.5
Typ.
1.0 0.5
Mi n.
100
0 10 12 14 16 18 20 V BS Supply Voltage (V) Figure 14B. V BS Supply Current vs. Supply Voltage
0.0 -50
-25
0
25
50
o
75
100
125
Temperature ( C)
Figure 15A. V CC Supply Current vs. Tem perature
12
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IR2108(4) (S)
3.0 2.5 2.0 1.5
M ax.
60 Logic "1" Input Current ( A) 50 40 30 20 10 0 -50 -25 0 25 50 75 100 125 Temperature ( oC) Figure 16A. Logic "1" Input Current vs. Tem perature
M ax. Typ.
V CC Supply Current (mA)
1.0
Typ.
0.5 0.0
Mi n.
10
12
14 16 18 V CC Supply Voltage (V)
20
Figure 15B. V CC Supply Current vs. Supply Voltage
60 Logic "1" Input Current ( A) 50 40 30
M ax.
5 Logic "0" Input Current ( A) 4 3
M ax.
2 1 0 -50
20 10 0 10 12 14 16 18 20 VCC Supply Voltage (V) Figure 16B. Logic "1" Input Current vs. Supply Voltage
Typ.
-25
0
25
50
75
100
125
Temperature ( oC) Figure 17A. Logic "0" Input Curre nt vs . Te m pe rature
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13
IR2108(4) (S)
5 V CC UVLO Threshold (+) (V) Logic "0" Input Current ( A) 4 3 2 1 0 10 12 14 16 18 20 V CC Supply Voltage (V) Figure 17B. Logic "0" Input Current vs. Supply Voltage
M ax.
12 11 10 9 8 7 -50 -25 0 25 50 75 100 125 Temperature (oC) Figure 18. V CC Undervoltage Threshold (+) vs. Tem perature
M ax. Typ.
Mi n.
11 VCC UVLO Threshold (-) (V) 10
M ax.
12 V BS UVLO Threshold (+) (V) 11 10 9 8
M ax.
9
Typ.
8
Mi n.
Typ.
7 6 -50 -25 0 25 50 75 100 125 Temperature (oC)
Mi n.
7 -50
-25
0
25
50
o
75
100
125
Temperature ( C) Figure 20. V BS Undervoltage Threshold (+) vs. Tem perature
Figure 19. V CC Undervoltage Threshold (-) vs. Tem perature
14
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IR2108(4) (S)
11 V BS UVLO Threshold (-) (V) 10 9 8
Mi n. M ax. Typ.
500 Output Source Current ( A) 400 300
Typ.
200
Mi n.
7 6 -50
100 0
-25
0
25
50
75
100
125
-50
-25
0
25
50
o
75
100
125
Temperature (oC) Figure 21. V BS Undervoltage Threshold (-) vs. Tem perature
Temperature ( C) Figure 22A. Output Source Current vs. Tem perature
500 Output Source Current ( A) Output Sink Current (mA) 400 300 200
Typ.
600 500
Typ.
400 300 200 100 0
Mi n.
100
Mi n.
0 10 12 14 16 18 20 V BIAS Supply Voltage (V) Figure 22B. Output Source Current vs. Supply Voltage
-50
-25
0
25
50
75
100
125
Temperature (oC) Figure 23A. Output Sink Current vs. Tem perature
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15
IR2108(4) (S)
600 500 400 300
Typ.
0 V S Offset Supply Voltage (V) -2
Typ.
Output Sink Current ( A)
-4 -6 -8 -10
200 100 0 10 12 14 16 18 20 V BIAS Supply Voltage (V) Figure 23B. Output Sink Current vs. Supply Voltage
Mi n.
10
12
14
16
18
20
V BS Flouting Supply Voltage (V) Figure 24. Maxim um V s Negative Offset vs. Supply Voltage
140 120 100 80 60 40 20 1 10 100 1000 Frequency (KHz) Figure 25. IR2108 vs. Frequency (IRFBC20), Rgate=33 , V CC=15V
140V 70V 0V
140 120 Temperature ( oC) 100
140V
Temprature ( oC)
80
70V
60 40 20 1 10 100
0V
1000
Frequency (KHz)
Figure 26. IR2108 vs. Frequency (IRFBC30), Rgate =22 , VCC =15V
16
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IR2108(4) (S)
140 120 Temperature ( oC) Temperature ( oC) 100
140V
140 120 100 80 60 40 20 1 10 100 1000 1 10 100
140V 70V
0V
80 60 40 20 Frequency (KHz)
70V 0V
1000
Frequency (KHz) Figure 28. IR2108 vs. Frequency (IRFPE50), Rgate=10 , V CC=15V
Figure 27. IR2108 vs. Frequency (IRFBC40), Rgate=15 , V CC=15V
140 120 Temperature ( oC) 100 80 60 40
0V 140V 70V
140 120 Temperature ( oC) 100 80
140V
60
70V
40 20 1 10 100 1000 1 10 100
0V
20 Frequency (KHz) Figure 29. IR21084 vs. Frequency (IRFBC20), Rgate=33 , V CC=15V
1000
Frequency (KHz) Figure 30. IR21084 vs. Frequency (IRFBC30), Rgate=22 , V CC=15V
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17
IR2108(4) (S)
140 120 Temperature ( oC) Temperature ( oC) 100
140V
140 120 100 80 60 40 20 1 10 100 1000 1 10 100
140V
70V
0V
80 60 40 20 Frequency (KHz)
70V 0V
1000
Frequency (KHz) Figure 32. IR21084 vs. Frequency (IRFPE50), Rgate=10 , V CC=15V
Figure 31. IR21084 vs. Frequency (IRFBC40), Rgate=15 , V CC=15V
140 120 Temperature ( oC) Temperature ( oC) 100 80 60 40 20 1 10 100 1000 Frequency (KHz) Figure 33. IR2108S vs. Frequency (IRFBC20), Rgate=33 , V CC=15V
140V 70V 0V
140 120
140V
100 80 60 40 20 1 10 100
70V 0V
1000
Frequency (KHz) Figure 34. IR2108S vs. Frequency (IRFBC30), Rgate=22 , V CC=15V
18
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IR2108(4) (S)
140 120 Temperature ( oC)
140V 70V
140 120 Tempreture ( oC)
140V 70V 0V
0V
100 80 60 40 20 1 10 100 1000 Frequency (KHz) Figure 35. IR2108S vs. Frequency (IRFBC40), Rgate=15 , V CC=15V
100 80 60 40 20 1 10 100 1000 Frequency (KHz) Figure 36. IR2108S vs. Frequency (IRFPE50), Rgate=10 , V CC=15V
140 120 Temperature ( oC) Temperature ( oC) 100 80 60 40 20 1 10 100 1000 Frequency (KHz) Figure 37. IR21084S vs. Frequency (IRFBC20), Rgate=33 , V CC=15V
140V 70V 0V
140 120 100 80 60
0V 140V 70V
40 20 1 10 100 1000 Frequency (KHz)
Figure 38. IR21084S vs. Frequency (IRFBC30), Rgate =22 , VCC =15V
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19
IR2108(4) (S)
140 120 Temperature ( oC) 100 80 60 40 20 1 10 100 1000 Frequency (KHz) Figure 39. IR21084S vs. Frequency (IRFBC40), Rgate=15 , V CC=15V Temperature ( oC)
140V 70V 0V
140 120 100 80 60 40 20 1 10 100
140V 70V 0V
1000
Frequency (KHz) Figure 40. IR21084S vs. Frequency (IRFPE50), Rgate=10 , V CC=15V
20
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IR2108(4) (S)
Case outlines
8-Lead PDIP
DIM
FOOTPRINT 8X 0.72 [.028]
01-6014 01-3003 01 (MS-001AB)
D A 5
B
INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A b c D
A1 .0040
6 E
8
7
6
5 H 0.25 [.010] A
E
6.46 [.255]
1
2
3
4
e e1 H K L
8X 1.78 [.070]
.050 BASIC .025 BASIC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X
e e1
3X 1.27 [.050]
y
A C 0.10 [.004] y
K x 45
8X b 0.25 [.010]
A1 CAB
8X L 7
8X c
NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INC HES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENG TH OF LEAD FOR SOLDERING TO A SUBSTRATE.
8-Lead SOIC
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01-6027 01-0021 11 (MS-012AA)
21
IR2108(4) (S)
14-Lead PDIP
01-6010 01-3002 03 (MS-001AC)
14-Lead SOIC (narrow body)
01-6019 01-3063 00 (MS-012AB)
IR WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 7/10/2003
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